Traditionally floating point operations have been performed by a floating point processor. In some systems, such as the IBM RT workstation, the floating point processor functions as a peripheral unit relative to the central processing unit. The operation of this external floating point processor is not closely synchronized with the operation of the central processing unit.
Floating point operations often require data that consists of a multiple of data words. Normally, the use of interleaved memory requires that data words be accessed starting at even addresses. This enables the even and odd words to be transmitted by some systems in parallel. Therefore, the loading and storing of floating point data requires that the data be stored on even memory address boundaries. When floating point arithmetic data has been stored on odd memory address boundaries, a system interrupt has been traditionally generated so that the system software can compensate for the misalignment of the floating point arithmetic data to enable the floating point processor to perform the specified floating point operation.
Examples of the prior art that address misaligned data include IBM Technical Disclosure Bulletin, Vol. 26, No. 12, May, 1984, pages 6473-6475, entitled "Memory Transfer at Arbitrary Byte Boundaries" which discloses a mechanism for reordering data bytes for transfer. IBM Technical Disclosure Bulletin, Vol. 27, No. 1A, June, 1984, pages 95-100, entitled "Dynamic Boundary Algorithm for a Data Movement Mechanism" discloses an algorithm to transfer data in groups having links specified by the address boundaries. IBM Technical Disclosure Bulletin, Vol. 27, No. 3, August, 1984, pages 1585-1587, entitled "Storage Write Operation Control" discloses the performance of a storage write operation when different write capacities are provided, i.e., full word, half word, and character transfers with odd or even alignment. IBM Technical Disclosure Bulletin, Vol. 24, No. 11B, April, 1982, pages 5948-5950, entitled "Odd-Byte Data Alignment Mechanism for System I/O" discloses an apparatus for achieving odd-byte data alignment for an I/O device.
It is the object of the present invention to provide a multiprocessing system for performing floating point operations. It is a further object of the present invention to provide a multiprocessing system for performing floating point operations wherein data stored for the floating point operations consist of multiple words and can be stored on either even or odd memory address boundaries.